Op-amp circuits from the ground up: watching inverting, non-inverting, and VCVS (Sallen-Key) in motion

Two rules

An op-amp amplifies the voltage difference between its + and − inputs by a factor of 100,000 or more and puts that out. At 100,000x, for the output to stay within the supply range (say ±10V), the input difference must be under 0.1mV. Feed part of the output back into the − input (negative feedback), and the op-amp moves its output to squeeze that input difference down that far. Which gives us:

Rule 1: with negative feedback in place, the + and − inputs sit at the same voltage (virtual short).

Rule 2: no current flows into either input terminal (input impedance is extremely high — pA-class for a CMOS input).

Use these two to ask "what's the voltage at the − input" and "where does the current flowing into it go," and you can find the output voltage of any op-amp circuit. Let's do that with three circuits.

Non-inverting amplifier: divide the output and feed it back to the − input

Feed the input signal V_in into the + input, and feed a divided fraction of the output — via R_f and R_g — back to the − input.

By Rule 1, the − input sits at V_in. Since the − input is the tap point of the R_f/R_g divider, V_in = V_out × R_g ÷ (R_f + R_g). So V_out = V_in × (1 + R_f ÷ R_g). What the op-amp is doing is raising its output until the divided result equals V_in.

Set R_f = 0 and R_g = ∞ (feed the output straight back to the − input) and you get a unity-gain voltage follower. It doesn't amplify, but by Rule 2 it draws no current from the input, and its output is low-impedance and can drive a load. As a buffer — "placed between a high-impedance source and a load that demands current" — this is the single most commonly used op-amp circuit.

The non-inverting input impedance is simply the op-amp's own + input (10⁹–10¹²Ω). Choose this topology when taking a signal from a sensor, a voltage divider, or any high-resistance source.

Inverting amplifier: pin the − input at 0V and feed current into it

Tie the + input to GND, feed the input signal through R_in to the − input, and feed the output through R_f back to the same − input.

By Rule 1, the − input sits at the same 0V as the + input (virtual ground). That means a current of V_in ÷ R_in flows into R_in. By Rule 2, none of that current can enter the op-amp, so all of it exits through R_f toward the output. The voltage across R_f is I × R_f, and since the − input side is 0V, V_out = −V_in × R_f ÷ R_in. The sign flips because the current is flowing "out" from the − input toward the output.

The big difference from the non-inverting case is that the input impedance here is just R_in. Because the − input is pinned at 0V, from the source's point of view it's as though the far end of R_in is tied to GND. If the source's output resistance isn't negligible compared to R_in, the gain drops (see Input impedance and gain error in the inverting amplifier for details).

In exchange, the inverting topology gets an advantage from having the − input pinned at 0V: bring several inputs together, each through its own resistor, to the − input, and the currents simply add — a summing amplifier. The inputs don't interfere with each other because the point where they meet is pinned at 0V.

VCVS-type 2nd-order filter (Sallen-Key): two capacitors added to a non-inverting amplifier

VCVS is short for Voltage-Controlled Voltage Source — "a box that multiplies the input voltage by K and outputs it." A non-inverting amplifier is exactly that, with K = 1 + R_f ÷ R_g (K = 1 for a follower). A 2nd-order filter built from this box is a VCVS-type filter, also called Sallen-Key after Sallen and Key, who published it in 1955.

The circuit stacks two RC stages (R₁–C₁, R₂–C₂) in series feeding the + input, except that the bottom of the first stage's capacitor C₁ ties to the output instead of GND. That single connection is what turns a plain two-stage RC into a 2nd-order filter.

At low frequency, the capacitors are effectively open, so the input reaches the + input unchanged and the output = K × input. At high frequency, C₂ pulls the + input to GND and C₁ is effectively shorted too, so the output falls at −40dB/decade. So far, this is the same as a plain two-stage RC.

The difference shows up near the cutoff. Because C₁'s bottom is tied to the output, as long as the output is moving in phase with the input, the voltage across C₁ stays small and almost no current flows through it. In other words, the first RC stage effectively "stops working" near cutoff, and the signal resists falling off there. This is a boost from positive feedback, and it's what turns the gentle rolloff of a plain two-stage RC into the "flat, then sharply falling" shape of a proper 2nd-order filter.

The strength of that boost is Q. With matched components — R₁ = R₂ = R, C₁ = C₂ = C — Q = 1 ÷ (3 − K). K = 1 gives Q = 0.5 (same as a plain two-stage RC, gentle); K = 1.586 gives Q = 0.707 (Butterworth, flattest passband); K = 2 gives Q = 1 (a 0dB peak at cutoff); K = 3 gives Q = ∞ (oscillation). Raising the gain strengthens the positive feedback, and at 3x it balances the negative feedback exactly and the circuit becomes an oscillator.

To raise Q while keeping K = 1 (a follower), change the capacitor ratio instead. With R₁ = R₂ = R, C₁ = m × C, C₂ = C ÷ m, Q = m ÷ 2. For Butterworth, m = √2, i.e. C₁ = 1.41C, C₂ = 0.707C (a 2x ratio). f_c = 1 ÷ (2πRC) stays the same. With fewer parts and unity gain, this is a common choice ahead of an ADC.

Things that catch you out on real hardware

• GBW. For a non-inverting or inverting circuit with gain G, the bandwidth is GBW ÷ noise gain (G for non-inverting, 1 + |G| for inverting). For a Sallen-Key, a rule of thumb is GBW ≥ f_c × Q × 100. Fall short and Q comes out higher than calculated, with a peak appearing.
• Single-supply mid-rail bias. Reference the + input to V_cc/2 and AC-couple the input. In an inverting circuit, tie the + input to the mid-rail and put a capacitor ahead of R_in. Build the mid-rail from a resistor divider plus a capacitor, and buffer it with a follower for low impedance if needed.
• Output swing. Even a rail-to-rail part can't swing within a few tens of mV of the rails; older parts stop 1–2V short. Before raising the gain, confirm the output actually fits.
• Capacitive loads. Tying 1nF or more directly to the output can cause oscillation. Add a series resistor of a few tens of Ω, or use a part rated for capacitive loads. The Sallen-Key's C₁ is tied to the output, but it goes through R₁, so this usually isn't an issue.
• Bias current and resistor values. With a bipolar input (tens to hundreds of nA) and resistors above 100kΩ, the offset reaches mV-class levels. Not a concern with a CMOS or JFET input.
• Supply decoupling. Put 0.1µF right at the op-amp's supply pins. Skip it and you risk high-frequency oscillation, or noise from other circuits coupling in.
• The Sallen-Key's high-frequency leakage. Attenuation stalls above roughly 100x f_c (see the article on passive vs. active filters). Where stopband attenuation matters, add a trailing RC stage, or switch to an MFB topology.