Op-amp circuits from the ground up: watching inverting, non-inverting, and VCVS (Sallen-Key) in motion

Two rules

An op-amp amplifies the difference between its + and − inputs by 100,000x or more. For the output to stay within the supply range (say ±10V), the input difference must be under 0.1mV. Feed part of the output back to the − input (negative feedback) and the op-amp moves its output to shrink that difference. Two rules follow.

Rule 1: with negative feedback, the + and − inputs sit at the same voltage (virtual short).

Rule 2: no current flows into either input (input impedance is extremely high; pA-class for a CMOS input).

Ask what voltage the − input sits at and where the current flowing into it goes, and you get the output voltage.

Non-inverting amplifier: divide the output and feed it back to the − input

Feed V_in into the + input and the output back to the − input through the R_f/R_g divider. By Rule 1 the − input sits at V_in, so V_in = V_out × R_g ÷ (R_f + R_g), that is, V_out = V_in × (1 + R_f ÷ R_g).

With R_f = 0 and R_g = ∞ you get a unity-gain voltage follower. By Rule 2 it draws no current from the input, and its low-impedance output can drive a load. As a buffer between a high-impedance source and a load that demands current, it is the most commonly used op-amp circuit.

Inverting amplifier: pin the − input at 0V and feed current into it

Tie the + input to GND, and feed the input through R_in and the output through R_f into the − input. By Rule 1 the − input sits at 0V (virtual ground), so V_in ÷ R_in flows in R_in. By Rule 2 all of it exits through R_f toward the output. The voltage across R_f is I × R_f and the − input side is 0V, so V_out = −V_in × R_f ÷ R_in. The sign flips because the current leaves the − input toward the output.

Comparing the three circuits

The non-inverting input impedance is the op-amp's own + input (10⁹–10¹²Ω), so choose it for signals from a sensor or a high-resistance source. The inverting input impedance is just R_in, and if the source's output resistance is not negligible against R_in, the gain drops (see Input impedance and gain error in the inverting amplifier).

In exchange, pinning the − input at 0V is an advantage: bring several inputs to it, each through its own resistor, and the currents add, giving a summing amplifier. The inputs do not interfere.

VCVS-type 2nd-order filter (Sallen-Key): two capacitors added to a non-inverting amplifier

A VCVS (voltage-controlled voltage source) is a box that multiplies the input voltage by K, which is exactly a non-inverting amplifier (K = 1 + R_f ÷ R_g, or 1 for a follower). A 2nd-order filter built from it is called Sallen-Key, after the 1955 paper by Sallen and Key.

The circuit stacks two RC stages (R₁–C₁, R₂–C₂) feeding the + input, with the bottom of C₁ tied to the output instead of GND. That one connection turns a two-stage RC into a 2nd-order filter.

The difference shows up near cutoff. While the output moves in phase with the input, the voltage across C₁ stays small, almost no current flows, and the first RC stage stops working, so the signal resists falling. This positive-feedback boost turns the gentle rolloff of a two-stage RC into the flat-then-steep shape of a 2nd-order filter.

The strength of the boost is Q. With R₁ = R₂ = R and C₁ = C₂ = C, Q = 1 ÷ (3 − K). K = 1 gives Q = 0.5 (same as a two-stage RC); K = 1.586 gives Q = 0.707 (Butterworth, flattest passband); K = 2 gives Q = 1 (a 0dB peak at cutoff); K = 3 gives Q = ∞ (oscillation).

To raise Q at K = 1, keep R₁ = R₂ = R and change the capacitor ratio: with C₁ = m × C and C₂ = C ÷ m, Q = m ÷ 2. For Butterworth, m = √2, so C₁ = 1.41C and C₂ = 0.707C, and f_c = 1 ÷ (2πRC) is unchanged. This is common ahead of an ADC.

GBW and bandwidth

The bandwidth of a gain-G circuit is GBW ÷ noise gain, where the noise gain is G for non-inverting and 1 + |G| for inverting. For a Sallen-Key, aim for GBW ≥ f_c × Q × 100; fall short and Q rises above the calculated value, with a peak.

Things that catch you out on real hardware

• Single-supply mid-rail bias. Reference the + input to V_cc/2 and AC-couple the input. In an inverting circuit, tie the + input to the mid-rail and put a capacitor ahead of R_in.
• Output swing. Even a rail-to-rail part cannot swing within a few tens of mV of the rails; older parts stop 1–2V short.
• Capacitive loads. 1nF or more directly on the output can cause oscillation. Add a series resistor of a few tens of Ω, or use a rated part. The Sallen-Key's C₁ goes through R₁, so it is usually fine.
• Bias current. With a bipolar input (tens to hundreds of nA) and resistors above 100kΩ, the offset reaches mV-class levels. CMOS or JFET inputs are fine.
• Supply decoupling. Put 0.1µF at the supply pins to avoid oscillation and noise.
• High-frequency leakage of the Sallen-Key. Attenuation stalls above roughly 100x f_c (see the article on passive vs. active filters). Where stopband attenuation matters, add a trailing RC stage or use an MFB topology.