Resistor divider error: how far tolerance and loading push you from the design value

Two ±1% resistors: a worst case of ±2% on the divider ratio

The error in the divider ratio R2 ÷ (R1 + R2) is largest when R1 and R2 drift in opposite directions. R1 at +1% and R2 at −1% pushes the ratio down; the reverse pushes it up.

For R1 = R2 (a 1/2 divider), 0.99 ÷ (1.01 + 0.99) = 0.495, or −1% against the design value of 0.5. For R1 = 9·R2 (a 1/10 divider), 0.99 ÷ (9.09 + 0.99) = 0.0982, or −1.8%. The smaller the divider ratio, the closer the error gets to ±2%. As a formula, the relative error in the divider ratio ≈ ±(R1 tolerance + R2 tolerance) × R1 ÷ (R1 + R2).

One LSB on a 12-bit ADC is 0.024% of full scale. A 2% error in the divider ratio is equivalent to 82LSB. No matter how much resolution you buy in the ADC, if the divider ahead of it is off by 2%, that is your absolute accuracy.

There are three fixes. Use 0.1%-tolerance resistors (a ±0.2% divider ratio). Calibrate at manufacture (apply a known voltage and store the measured ratio in firmware). Design so absolute accuracy doesn't matter — threshold detection and other uses that only care about relative change. 0.1% resistors cost several times as much as 1%, but that is usually still cheaper than adding a calibration step.

The load's input resistance lands in parallel with R2

Connect anything to a divider's output and its input resistance R_L lands in parallel with R2, pulling the ratio down. Load a R1 = R2 = 100kΩ divider with R_L = 1MΩ and R2 ∥ R_L = 90.9kΩ, giving a ratio of 90.9 ÷ 190.9 = 0.476 — −4.8%, larger than the error from 1% resistors.

Keeping this error under 0.1% needs R_L at least 1000x R2. For R2 = 100kΩ that means R_L = 100MΩ — territory where you'd add an op-amp buffer instead. The other way to get there is to make R2 1/1000 of R_L: with R_L = 1MΩ, that's R2 = 1kΩ and R1 = 9kΩ, at the cost of more current through the divider (more on that below).

An ADC input is a special case. A SAR ADC connects a small capacitor (a few pF to a few tens of pF) to the divider output during sampling. The DC input resistance is high, but charging that capacitor draws a current pulse at the moment of sampling, and if the divider's output impedance (R1 ∥ R2) is high, it can't fully charge within the sampling window, and the reading comes in low. MCU datasheets carry a table of "input impedance under y kΩ for a sampling time of x µs" — keep the divider's R1 ∥ R2 under that limit, or place a 10–100nF capacitor at the divider output to supply the charging current.

A capacitor at the divider output does more than supply sampling charge — it also filters noise through the RC formed with R1 ∥ R2. Too large a time constant and it stops tracking changes in the input voltage, so it's a trade-off against response speed.

Power dissipation and voltage rating: dividing a high voltage

Dividing 48V down to 4.8V with R1 = 90kΩ, R2 = 10kΩ draws 0.48mA and dissipates 0.48mA² × 90kΩ = 21mW in R1 — no problem. Drop to R1 = 9kΩ, R2 = 1kΩ instead and the current rises to 4.8mA, with 207mW dissipated in R1. That exceeds a 1608 (0603)'s 100mW rating, and even a 3216 (1206, 250mW) falls short once you apply derating.

Voltage rating is also easy to overlook. Chip resistors carry a maximum working voltage — commonly 50V for a 1005, 75V for a 1608, 150V for a 2012, and 200V for a 3216. Exceed that voltage across the part and it's unusable regardless of resistance value. Use a 1608 for R1 dividing down 100V and it sees 90V across it, over its 75V rating. Move up to a 2012 or larger, or split R1 into two resistors in series to share the voltage.

For a high-voltage divider, splitting R1 into two or three resistors in series is standard practice. It spreads both the voltage rating and the power dissipation, and it limits how far the output can jump if any single resistor fails short.

Temperature coefficient acts on the ratio

A typical chip resistor's temperature coefficient runs ±100–200ppm/°C, up to ±1% over a 50°C swing. But what matters for the divider ratio is the difference between R1's and R2's coefficients; resistors of the same series and material have similar coefficients, drift the same direction together, and leave the ratio nearly unchanged.

The trouble comes from mixing resistor types between R1 and R2 (thick-film with thin-film, or different sizes), or from R1 alone self-heating in a high-voltage divider. If you're using 0.1% resistors, match R1 and R2 as thin-film parts rated at ±25ppm/°C or better as well.

For maximum accuracy, resistor-network parts put R1 and R2 in a single package for exactly this purpose — ratio accuracy of ±0.05% and a coefficient mismatch of ±5ppm/°C are typical figures. Their ratio accuracy beats individual 0.1% resistors, and the two halves stay at the same temperature.

Noise and leakage at high resistance

Push toward high resistance to cut power — R1 = 1MΩ, R2 = 100kΩ, say — and a different set of problems shows up.

Thermal noise. A resistor carries a noise voltage of √(4kTRB) — 40nV/√Hz for 100kΩ, or 4µVrms over a 10kHz bandwidth. That's small next to a 12-bit ADC's 1LSB (0.8mV on a 3.3V full scale), but it starts to matter at 16 bits (50µV).

Board leakage. Flux residue or humidity lowering the board's surface insulation resistance effectively puts tens to hundreds of MΩ in parallel with R2. 100MΩ across a 100kΩ R2 is a 0.1% error — visible in a high-precision divider.

Input bias current. With a bipolar-input op-amp or an ADC input leakage current as high as 1µA downstream, 1µA through R1 ∥ R2 = 90kΩ is a 90mV error. A CMOS input (a few pA) is negligible.

Induced noise. A high-impedance node picks up external noise. Lower the impedance with a capacitor at the divider output, or keep the trace short.

Keeping the divider current in the 10µA to 1mA range balances these issues against power dissipation. For a 3.3V divider, that means a total resistance of 3.3kΩ to 330kΩ.