Why is a clock crystal 32.768kHz? The reason it isn't built to output 1Hz directly

32768 = 2 to the 15th power

Divide 32768 by 2 and you get 16384; divide again and you get 8192; at the 15th division you reach exactly 1. That's because 32768 = 2¹⁵. A crystal that vibrates 32768 times a second, with a "count only every other one" operation repeated 15 times, yields one pulse per second.

This is about as simple as a circuit gets: one toggle that flips its output on every input edge. Two input cycles give one output cycle, so the frequency is halved. Fifteen in series form the divider, a few hundred transistors.

A decimal crystal such as 10000Hz or 100000Hz would need a more complex "one in ten" counter. With a power of two, the simplest circuit repeated is enough. That is the first reason for the odd number 32768.

So why not just make a 1Hz crystal?

A 1Hz crystal would seem simpler, but some reasons say it can't be built and others say it shouldn't be.

It is too large to build. A clock crystal is a tuning fork: a longer arm vibrates more slowly, and frequency is inversely proportional to the square of the arm length. Dropping to 1/32768 needs arms √32768 ≈ 181 times longer, and a 32.768kHz fork has arms around 3mm, so a 1Hz fork would need arms over 50cm (3mm × 181 ≈ 54cm). It won't fit in a wristwatch, and long arms sag and destabilize the frequency. Crystals are only practical above roughly 10kHz.

It can't be trimmed finely. Crystals vary by around ±20ppm from part to part, which is ±1.7 seconds a day. The correction is to count one extra pulse or skip one. At 32768Hz, skipping one of the 32768 pulses in a second is a 30.5ppm correction, and skipping one every few tens of seconds trims below 1ppm. At 1Hz the smallest step is one second, a 100% correction. Counting a fast vibration is what makes fine adjustment possible.

It can't make times shorter than a second. A 1/100-second stopwatch or a microcontroller woken every 1/256 second can use the 256Hz and 1024Hz points partway down the halving chain.

Start-up would be slow. A crystal needs tens of thousands of cycles to settle (a consequence of its high Q), which takes 0.5–2 seconds at 32.768kHz, and RTC initialization has to wait for it (an LSERDY flag or similar). At 1Hz it takes hours to half a day.

Jitter averages out. Each cycle carries a little timing jitter, and the one-second pulse comes from counting 32768 cycles, so the jitters cancel and leave 1/√32768 ≈ 1/181 of a single cycle's jitter.

An RC oscillator (charging and discharging a capacitor through a resistor) can make 1Hz without a crystal, but its accuracy is only 1% to a few percent. 1% is 15 minutes of drift a day, useless for a clock. A crystal's ±20ppm is more than 500 times more accurate.

So why not go with a higher frequency instead?

Fast crystals such as 4MHz or 10MHz are used as microcontroller clocks, but the main reason they aren't used in clocks is the battery. Current draw is proportional to frequency. A CMOS circuit draws current every time a signal switches, and a 32.768kHz oscillator plus divider runs on 0.3–1µA combined. A CR2032 coin cell (225mAh) could theoretically run it for 25+ years, and in practice lasts 5–10 years. At 4MHz the current rises by more than 100x, and the battery lasts only a few weeks.

The tuning-fork type is small and cheap. The 32.768kHz tuning-fork crystal is the highest-volume crystal made anywhere, in a 2.0mm × 1.2mm package for a few cents.

It also sits above the audible range. Human hearing tops out around 20kHz, so a 32.768kHz fork vibrates but is inaudible. Early wristwatch crystals at 8192Hz and 16384Hz were bigger and audible. Just above 20kHz, a power of two, with low enough current draw: that intersection is 32768Hz.

How temperature shifts the frequency

A tuning-fork crystal's frequency peaks near 25°C and falls with the square of the temperature difference from there (around −0.035ppm/°C²). At 0°C or 50°C that is −22ppm, or −1.9 seconds a day. Hot or cold, the clock runs slow. High-precision RTC ICs (the DS3231, for example) correct for this with a temperature sensor and hold ±2ppm.

Designing around the crystal

Load capacitance also moves the frequency. If the capacitors across the crystal (the load capacitance, 6pF or 12.5pF) drift from spec, the frequency shifts by around 10ppm per 1pF, so match them including the board's stray capacitance. A microcontroller's RTC has a calibration register that adds or removes a few pulses over 32 seconds for ±0.5ppm steps.

The oscillator is driven weakly, so it is vulnerable to noise and leakage. The traces are high-impedance, and coupling from a neighboring signal or leakage through flux residue can stop the oscillation or shift its frequency. Standard practice is to place the crystal right next to the IC, keep the traces short, surround it with GND, and route no other signal underneath it.

The advantage of counting

Counting fast vibrations allows fine trimming, shorter time intervals, and averaged-out jitter. 32768Hz sits between the lowest frequency a crystal can be built at (the tens of kHz) and the highest the battery can sustain (below 100kHz), and it is a power of two that is inaudible: close to the only value that meets every constraint.

For estimating current draw and battery life, use the mAh→Wh calculator and the power consumption calculator; for converting between frequency and period, use the frequency ⇔ wavelength calculator.