A buck converter's input capacitor carries half the output current

In a buck converter making 6V from 12V, the RMS ripple current in the input capacitor is half the output current. D = 0.5 in Irms = Iout√(D(1−D)) is the worst case, so the closer Vout/Vin is to 1/2, the harder the input capacitor is to choose.

Last updated: 2026-10-09 Buck converterInput capacitorRipple currentMLCCAluminum electrolytic capacitor

Input current is a pulse train: the capacitor carries the AC part

The output capacitor sees only the inductor ripple current (a triangle wave), but the input capacitor sees something different. A buck converter draws current from the input only while the high-side switch is on: it pulls roughly the output current the instant the switch closes and drops to zero when it opens. The upstream source (battery, AC adapter, upstream regulator) cannot follow that change and supplies only the average (DC part). The input capacitor covers the difference between the pulse and the average (the AC part).

With duty D = Vout/Vin, the input current is Iin = Iout during the on-time (D·T), Iin = 0 during the off-time ((1−D)·T), and the average is Iavg = D·Iout. The capacitor current is the difference from that average: it discharges at Iout(1−D) during the on-time and recharges at D·Iout during the off-time. Charge in and out balance over a period, so the capacitor voltage only ripples slightly.

Where a synchronous buck converter's losses come from covered the output side. This article follows the input side.

Buck input current is a pulse train: upstream supplies DC, the input capacitor the AC partTop: the buck circuit (Vin, Cin, high- and low-side switches, inductor L, Cout, load). Bottom: the input current waveform, with the average (DC part) dashed and the AC part shaded. An animation alternates the on and off phases. 1. On: Cin discharges to fill the gap Iin = Iout. Upstream supplies only the average D·Iout, so Cin discharges the shortfall Iout(1−D) 2. Off: Cin recharges Iin = 0. The upstream current D·Iout has nowhere to go and charges Cin Vin Cin SW (high) SW (low) L Cout Load Iout Cin discharge: Iout(1−D) Cin charge: D·Iout Iout 0 Average (DC) = D·Iout (from upstream) AC part (Cin discharges) AC part (Cin charges) ON OFF D ≈ 0.417 (Vin = 12V, Vout = 5V example) Charge in and out balance each period, so Cin voltage only ripples slightly
Figure 1: the input current is a pulse train. The source supplies only the average (DC part, dashed) and Cin covers the difference (AC part, shaded).

Irms = Iout√(D(1−D)): D = 0.5 is the worst case

The RMS current in the input capacitor comes from weighting the on-time and off-time currents by time. The result is Irms = Iout·√(D(1−D)), an approximation that ignores the small inductor ripple. It is small when D (= Vout/Vin) is near 0 or 1 and peaks at Iout/2 at D = 0.5, the waveform that is furthest from its average, with full current for half the time.

Check it with numbers, using the same conditions as the buck converter calculator: Vin = 12V, Iout = 5A, and several values of Vout.

Input capacitor ripple current at Vin = 12V, Iout = 5A (Irms = Iout√(D(1−D)), ignoring inductor ripple)
VoutD = Vout/VinIrmsIrms / Iout
1.2V0.101.50A30%
3.3V0.2752.23A45%
5V0.4172.47A49%
6V0.502.50A (max)50%

12V to 6V (D = 0.5) is the worst case: Irms = 2.5A for Iout = 5A, half the output current. At a low duty such as 12V to 1.2V, Irms falls to 30% of Iout. A POL making 5V or 6V from a 12V bus meets this condition, so the closer the output is to half the input voltage, the more margin the input capacitor's ripple rating needs.

Input capacitor Irms/Iout against D (= Vout/Vin)Irms is small near D = 0 or 1; the closer D is to 0.5, the more ripple margin the input capacitor needs. Input capacitor Irms/Iout against D (= Vout/Vin) Irms = Iout√(D(1−D)). Four table points (Vin = 12V, Vout = 1.2/3.3/5/6V) 0.0 0.2 0.4 0.6 0.8 1.0 0.0 0.1 0.2 0.3 0.4 0.5 Irms / Iout 1.2V 3.3V 5V Peak at D = 0.5, Vout = 6V (Irms = Iout/2) D = Vout / Vin Irms is small near D = 0 or 1; the closer D is to 0.5, the more ripple margin the input capacitor needs. Approximation ignoring inductor ripple (see text).
Figure 2: Irms/Iout against duty D, reaching 0.5 at D = 0.5. The four points from the table are plotted.

ESR heating

Current through the equivalent series resistance (ESR) heats the part by P = Irms² × ESR. It scales with the square of the current, so doubling Irms quadruples the heat. In the Vout = 5V example (Irms = 2.47A), a multilayer ceramic capacitor (MLCC) with ESR = 5mΩ dissipates P ≈ 2.47² × 0.005 ≈ 31mW. That looks small, but an MLCC is a few millimeters square and sheds heat poorly, so even tens of mW can raise its surface temperature a few to over ten degrees above ambient.

An aluminum electrolytic with ESR = 80mΩ (a typical low-ESR part) carrying the same 2.47A dissipates P ≈ 2.47² × 0.08 ≈ 0.49W, nearly 0.5W in one part. In a hot enclosure that is not negligible, so look at ESR and Irms together, not capacitance alone.

ESR also changes with frequency. Aluminum electrolytics often stay high above 100kHz, so read the datasheet's ESR-versus-frequency graph or impedance curve at the actual switching frequency. Using the ESR quoted at 25°C and 120Hz underestimates the loss.

MLCC ripple current rating: what the ΔT basis means

An MLCC's "allowable ripple current" is, for many manufacturers, the current at which self-heating stays within a set temperature rise (ΔT of about 20°C is a common guide). Exceeding it does not destroy the part at once, but the rise eats into the margin to the upper operating temperature (125°C is typical for X7R). As Ceramic capacitors lose capacitance when you apply voltage showed, capacitance also changes with temperature, so heating shifts the characteristics too.

When an MLCC is the input capacitor, keep ample margin between the calculated Irms and the allowable ripple current (2x is common in practice). Carrying the 2.5A in the table (Vout = 6V) in one MLCC leaves little margin even in a large 1210 or 1812 case, so the standard fix is to use several in parallel to share Irms.

Aluminum electrolytic ripple rating and life: the 10°C rule

Many manufacturers specify an aluminum electrolytic's allowable ripple current as the current at which the core (internal) temperature rise stays within a set value (roughly 5-10°C, depending on series) at a given frequency and ambient temperature (often 105°C for 105°C parts). The heating idea is the same as for MLCCs, but electrolytics add a life limit.

Life is set by electrolyte evaporation (dry-out). Many manufacturer documents use the "10°C rule", an Arrhenius-based approximation: life roughly doubles for every 10°C drop in operating temperature and halves for every 10°C rise. Rated life (for example 2000 hours at 105°C) applies at the rated temperature and rated ripple current.

Heating scales with the square of the ripple current. At 70% of rated ripple, heating is 0.7² ≈ 0.49 times. If the rated temperature rise ΔT0 is 10°C, the actual rise is about 4.9°C, about 5.1°C below rating, and the 10°C rule gives life 2^(5.1/10) ≈ 1.4 times longer. Conversely, ripple above rating raises the temperature rise and shortens life exponentially. Running near-rated ripple in a hot enclosure risks capacitance loss and ESR rise earlier than expected.

Why parallel capacitors do not share evenly

Paralleling capacitors to spread Irms is sound, but the current does not necessarily split evenly. Inductance matters in practice.

At each switch edge the input current rises and falls by several amps in nanoseconds; 5A in 5ns is di/dt = 1A/ns. As Via inductance blunts decoupling showed, the traces and vias from a capacitor pad to the switch node add roughly 0.5-3nH, and V = L·di/dt gives 0.5V at 0.5nH and 2V at 2nH. That is far larger than the ESR differences (a few to tens of mΩ, or 15-100mV even at 5A), so at the edge the current concentrates in the lowest-inductance path, the capacitor closest to the switch node.

The RMS over a full period is shared by ESR and capacitance, so it evens out somewhat. Still, the farther the capacitor, the higher its loop impedance stays, and the nearest one tends to carry most of it. Rated Irms does not simply grow with the number in parallel.

When mixing MLCCs and electrolytics, the usual practice is to put several low-inductance, high-frequency MLCCs right next to the switch node and one or two electrolytics a little further away, where ESR and capacitance handle the low-frequency average ripple and hold-up. MLCCs operate under DC bias from Vin (say 12V), so the capacitance loss described in Ceramic capacitors lose capacitance when you apply voltage applies (a 16V part at 12V often keeps less than half its rated value). Mixing MLCCs of different case sizes or voltage ratings shifts the capacitance ratio away from catalog values and makes sharing harder to predict.

Parallel capacitors do not share evenly: the nearest MLCC takes the edgeCurrent paths into three MLCCs at different distances from the switch node and one aluminum electrolytic. Dash thickness shows current. In the edge (fast di/dt) phase the nearest MLCC is thickest; in the RMS (low-frequency) phase it evens out somewhat. 1. Edge (fast di/dt): nearest MLCC takes it Trace and via inductance differences outweigh ESR differences 2. RMS (low-frequency part): evens out somewhat ESR and capacitance set the split, but loop impedance differences remain Switch node C MLCC 1 (near) C MLCC 2 C MLCC 3 (far) C Al electrolytic Trace (longer = more inductance) Edge voltage difference (5A in 5ns: di/dt = 1A/ns) L = 0.5nH gives V = L·di/dt = 0.5V; L = 2nH gives 2V (trace and via inductance difference) An ESR difference (a few to tens of mΩ) gives only 15-100mV at the same 5A At the edge, inductance (volts) overwhelms ESR (tens of mV)
Figure 3: how current splits. At the edge it concentrates in the MLCC nearest the switch node, and evens out somewhat in RMS terms.

Comparison with the output capacitor, and multiphase

The output capacitor carries the inductor ripple current itself (a triangle wave with zero average). Its amplitude is about half the inductor ripple ΔIL (often 20-40% of Iout), far below the input capacitor's Irms (up to Iout/2 here). The input side is harder because it receives pulsed current.

Multiphase operation reduces input ripple. With several phases offset in time, the on-times of the phases no longer overlap and the total input current flattens. With two phases it cancels almost completely in theory as D approaches 0.5. In the Vout = 5V example (D ≈ 0.417), Irms drops from 2.47A for one phase to 0.93A for two, a reduction of about 60%. Multiphase controllers are used in high-current POLs partly because they cut the number and size of input capacitors.

Input (1-phase and 2-phase) and output capacitor current waveformsVin = 12V, Vout = 5V (D ≈ 0.417), Iout = 5A Input (1-phase and 2-phase) and output capacitor current waveforms Vin = 12V, Vout = 5V (D ≈ 0.417), Iout = 5A Input (1-phase) Average (DC) Irms = 2.47A Input (2-phase) Irms = 0.93A (−60%) Output Triangle, small amplitude The input capacitor carries the AC part of the pulse train, so Irms is large. The output capacitor carries only the inductor ripple (a triangle wave), so its amplitude is small. With multiphase the phase pulses cancel and the input Irms falls sharply.
Figure 4: one phase has large input ripple, and two interleaved phases flatten it (2.47A to 0.93A at Vout = 5V). The output capacitor current is a small triangle wave.

What catches people on real boards

  • Only the input capacitor is very hot. The Irms estimate may be too low, or one of the parallel parts may be taking the current. A thermal image often shows only the one closest to the switch is hot.
  • Input voltage ripple and noise are large. With too little capacitance or ESR, or a layout with high wiring inductance, spikes ride on the input rail at every switch edge and can upset other ICs on the same rail.
  • Measured efficiency is worse than calculated. If the efficiency calculator result and the measurement differ, check whether the input capacitor's ESR loss was left out. Even a few hundred mW can cost about 1% in a small converter.
  • An electrolytic lost capacitance early after a design was reused. Check whether changing Vin/Vout moved D and raised Irms. Moving toward D = 0.5 raises Irms by up to nearly 1.7x at the same Iout (1.5A at D = 0.1 to 2.5A at D = 0.5).
  • How to check. Put an oscilloscope probe (short ground lead) right at the input capacitor, and measure the lead current directly if you have a current probe. Otherwise estimate it from the voltage ripple and ESR, or look at the heating pattern with a thermal camera.

Frequently asked questions

Can I choose the input capacitor's Irms rating to match the calculated value exactly?
No. Allowing for uneven sharing between parallel parts, ambient temperature, and extra ripple during load changes, keep about 2x margin over the calculated Irms.
Can the input capacitor be all MLCCs?
They are good at high frequency and have low ESR, so ripple heating is favorable. They need many in parallel because each has little capacitance, which takes board area. An electrolytic's ESR can damp inrush at start-up and hot-plug, so with long cables use an electrolytic or polymer capacitor as well.
Why is D = 0.5 (Vout = Vin/2) the worst case?
Irms = Iout√(D(1−D)) peaks at 0.5 when D = 0.5. That is the waveform with the biggest on-off difference: full Iout for half the time.
Is it acceptable to ignore the inductor ripple current in the input capacitor's ripple?
The formula in the text ignores the inductor ripple ΔIL. For a typical design with ΔIL at 20-30% of Iout, the error is usually a few percent, enough for an estimate. For a tight design, recalculate with ΔIL included.
Does multiphase remove the need for an input capacitor?
No. Cancellation is incomplete during load transients that shift duty and timing, or for some combinations of phase count and duty. The high-frequency content at the edges still has to be handled by local MLCCs, so multiphase reduces the input capacitors but does not eliminate them.

Standards and references

  • Manufacturer MLCC technical documents — Definition of allowable ripple current (a self-heating temperature rise ΔT basis) and ESR versus frequency
  • Manufacturer aluminum electrolytic capacitor catalogs and technical documents — Rated ripple current and life estimation (the Arrhenius-based "10°C rule")
  • Texas Instruments, application notes on buck converter input and output capacitor selection — Derivation of the input capacitor ripple current formula (Irms = Iout√(D(1−D)))
  • Manufacturer multiphase controller IC datasheets and application notes — Input ripple current reduction from multiphase interleaving

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